vlsi architecture-3




vlsi ARCHITECTURE OF PARALLEL MULTIPLIER–ACCUMULATOR BASED ON RADIX-2 MODIFIED BOOTH ALGORITHM
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ABSTRACT-A new architecture of multiplier-andaccumulator (MAC) for high-speed
arithmetic. By combining multiplication with accumulation and devising a hybrid type of carry
save adder (CSA), the performance was improved. Since the accumulator that has the




IEEE PAPER UNITED STATES