digital signal processing-11




Static Rate-Optimal Scheduling of Multirate DSP Algorithms via Retiming and Unfolding
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XY Zhu, M Geilen, T Basten ,
Abstract—This paper presents an exact method and a heuristic method for static rate-optimal
multiprocessor scheduling of real-time multirate DSP algorithms represented by
synchronous data flow graphs (SDFGs). Through exploring the state-space generated by 

Design of a Scalable Polyphony-MIDI Synthesizer for a Low Cost DSP
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A Huovilainen ,2010 ,lib.tkk.fi
Advances in computing power, miniaturization and communication bandwidth have
revolutionized personal music listening in the last decade. It is now common for people to
have multiple personal audio devices that are small enough that they can be always 

Introduction to TMS320C6000 DSP Optimization
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P Yin ,Performance Improvement, 2011 ,ti.com
ABSTRACT The TMS320C6000™ Digital Signal Processors (DSPs) have many
architectural advantages that make them ideal for computation-intensive real-time
applications. However, to fully leverage the architectural features that C6000™ processors 

Design of PM Motor Drive Course and DSP Based Robot Traction System Laboratory
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D Yousfi, S Belkouch, A Ait Ouahman ,Journal of Power , 2010 ,review.jpe.or.kr
Abstract This paper presents a part of North Africa/Europe collaboration results in education
to develop project-oriented courses in power electronics and motor drive field. The course
aims to teach Permanent Magnet motor drives close to a real world project of significant 

Network Working Group JM. Valin Internet-Draft Octasic Inc. Intended status: Standards Track S. Borilin Expires: December 15, 2011 SPIRIT DSP
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K Vos, C Montgomery ,2011 ,208.66.40.242
Abstract This document provides general guidelines for work on developing and specifying
a codec within the IETF. These guidelines cover the development process, evaluation,
requirements conformance, and intellectual property issues.

Applying Various DSP-Related Techniques for Robust Recognition of Adult and Child Speakers.
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R Atachiants, C Bendermacher, E Lesser ,2009 ,au-crepuscule.com
Abstract This paper approaches speaker recognition in a new way. A speaker recognition
system has been realized that works on adult and child speakers, both male and female.
Furthermore, the system employs text-dependent and text-independent algorithms, which 

DTC strategy for a DSP-based Five-Level Flying-Capacitor Drive with improved flux estimation
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M ARASTEH, A RAHMATI, S FARHANGI ,red.pe.org.pl
Abstract. This paper gives a detailed analysis of direct torque control (DTC) strategy in a five-
level drive and proposes a 24-sector switching table. Also, flux estimation has been
improved by a discrete-time low-pass filter (LPF) with variable cut-off frequency. Algorithm 

Energy-efficient DSP System Design based on the Redundant Binary Number System
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R Mahadevan ,2011 ,129.219.247.59
ABSTRACT Redundant Binary (RBR) number representations have been extensively used
in the past for high-throughput Digital Signal Processing (DSP) systems. Data-path
components based on this number system have smaller critical path delay but larger area 

Advanced Architecture for Multi-core DSP
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C Alexander, J Davidson, J Okuda ,people.oregonstate.edu
A digital signal processor (DSP) is a specialized microprocessor designed specifically for
digital signal processing, generally in real-time. DSPs can also be used to perform
generalpurpose computation, but they are not optimized for this function. DSPs can 


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