Review on FPGA Implementation of 16*16 Vedic Multiplier in VHDL Environment IJTSRD
Multipliers are the main key components of many high performance systems such as FIR filters, Microprocessors, Digital Signal Processors, ALU and etc.It improves the speed of the many processors. Vedic mathematics is mainly based on sixteen principles or word-formulae which are termed as Sutras .A high speed complex 16 *16 multiplier design by using urdhvatiryakbhyam […]