Design and Implementation of Low Power Adiabatic System for Power Recycling in Frequency Divider
Frequency divider to generate a frequency that is a multiple of a reference frequency. The latch based frequency divider are cascaded the two static differential sense amplifier pulsed latch SSA SPL with body biasing techniques. The operation of this type divider is to reduce power, delay and transistor size. The Adiabatic techniques dramatically reduce power […]
Fault Testing and Diagnosis of Sram based FBGA using Built-In-Self-Test-Architecture IJTSRD
A new low-power (LP) scan-based built-in self test (BIST) technique is proposed based on weighted pseudorandom test pattern generation and reseeding. A new LP scan architecture is proposed, which supports both pseudorandom testing and deterministic BIST. During the pseudorandom testing phase, an LP weighted random test pattern generation scheme is proposed by disabling a part […]