vlsi-vhdl research papers 2012 section 2

vlsi-vhdl research papers 2012 section 2







VHDL IMPLEMENTATION OF UNIVERSAL LINE ENCODER-DECODER FOR COMMUNICATION
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ABSTRACT This paper describes the implementation of various line encoders and decoders using VHDL on a single chip and it also enables the user to select one of them for the purpose of security, optimization of area and can support communication. The most

Synthesis and VHDL Implementation of Fuzzy Logic Controller for Dynamic Voltage and Frequency Scaling (DVFS) Goals in Digital Processors
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The concept of power consumption is becoming the primary concern in modern high performance processors, and in digital circuits and system on chips (SoCs). While CMOS technology has been scaling towards smaller feature sizes, the performance of digital

IMPLEMENTATION OF WLAN WEP PROTOCOL BY RC4 ALGORITHM IN VHDL
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ABSTRACT The WLAN is a network that utilizes radio frequency technology. The security of wireless data stream becomes particularly prominent. The WLAN uses RC4 stream encryption algorithm of the WEP protocol to enhance its Security. WEP itself also has fatal

VHDL code generation based on a hierarchical node structure
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Abstract This paper presents a VHDL code generation algorithm based on a hierarchical structure of elements provided by a graphical design tool that allows the design and simulation of VLSI dedicated microcontrollers. The control algorithm is designed visually

SIMULATION OF 64-BIT FUZZY INFERENCE PROCESSOR USING VHDL FOR ATM
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ABSTRACT The Fuzzy inference systems are becoming widely used in the field of real time control in various application, thanks to the potential offered by fuzzy logic and the possibility of implementation using very large scale integration (VLSI) technology, we deal a fuzzy

IMPLEMENTATION OF DIGITAL WATERMARKING USING VHDL
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ABSTRACT Digital watermarking technology is a frontier research field and it serves an important role in information security. Digital Watermarking is a technology of embedding watermark with intellectual property rights into images, videos, audios and other

Area Reduction and Doubling the Speed of FIR Filter using VHDL
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ABSTRACT The Finite Impulse Response (FIR) filter is a digital filter widely used in Digital Signal Processing applications in various fields like maging, instrumentation, and communications. This work proposes an VHDL generation software for FIR filters. In this

Comparison Between VHDL-AMS and PSPICE Modeling of Ultrasonic Transducer for Biological Mediums
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T MERDJANA, F CHIROUF, A CHAABI ABSTRACT Piezoelectric materials are commonly used in many applications. Different approaches were developed to predict the piezoelectric transducer behavior. Among them, the resolution of piezoelectric equations by numerical methods is currently used. Another

VHDL Implementation using Elliptic Curve Point Multiplication
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A Kumar, K Lala, A Kumar ABSTRACT This paper describes synthesizable VDHL implementation of elliptic curve Point Multiplication. Elliptic curves used for ECC are defined over mathematical structures called Galois fields. Based on the theory of ECC, this paper has carried out Modular

Design and Application of a Formal Verification Tool for VHDL Designs
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AK John, AK Bhattacharjee, M Sharma, G Ganesh ,barc.ernet.in ABSTRACT The design of Control and Instrumentation (CI) systems used in safety critical applications such as nuclear power plants involves partitioning of the overall system functionality into subparts and implementing each subpart in hardware and/or software as

A 32-Bit Signed/Unsigned Fixed Point Non-Restoring Square-Root Operation Using VHDL
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MMU Buradkar, PP Zode ABSTRACT After analyzing the advantages and disadvantages of all the general algorithms adopted in designing square root on FPGA chips with pipeline technology, a proposed algorithm based on digit by digit calculation method is discussed. The algorithm is

Communication by 31 Bit Hamming Code Transceiver with Even Parity and Odd Parity Check Method by Using VHDL
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ABSTRACT In communication system communication is possible in three modes. They are simplex, half duplex and full duplex mode. Here, we are working on full duplex mode by using the property of transceiver. Transceiver can transmits and receives data

VHDL Capture Guidelines
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ABSTRACT This document sets guidelines for the development of digital designs (circuits) and their subsequent capture with a Hardware Description Language (HDL); specifically, VHDL. This document is a guideline intended to be enforced by the design team with appropriate

An Implementation of WCDMA Rake Receiver on FPGA using VHDL Used In 3G Wireless Communications
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ABSTRACT 3G mobile communications is advanced and emerging technology in the field of wireless communication also providing facilities like multimedia accessing, internet services, higher capacity of data rates and multiple services for same connection. The Rake

Embedded Multiprocessor Architecture Using VHDL
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ABSTRACT Embedded multiprocessor design presents challenges and opportunities that stem from task coarse granularity and the large number of inputs and outputs for each task. We have therefore designed a new architecture called embedded concurrent computing (

Motion control-Fault diagnosis in Machines using VHDL
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KM Krishnan, N Rajeswaran ABSTRACT The machines which have become a part of present day life, even in some cases it overcome human working ways. So for there is major concern in functioning of motor drives because a minute faulty function of motor may lead to drastic damage in working

VHDL Implementation of a Low Power Fault Tolerant System
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ABSTRACT Testing of digital VLSI circuits entails many challenges as a consequence of rapid growth of semiconductor manufacturing technology and the unprecedented levels of design complexity and the gigahertz range of operating frequencies. These challenges

PERFORMANCE EVALUATION OF TURBO CODES USING HARD DECISION VITERBI ALGORITHM IN VHDL
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ABSTRACT We first briefly describe the algorithms of convolutional encoder and hard decision Viterbi decoder. The focus of this work is towards developing an application specific design methodology for low power solutions. The methodology starts from high level models

Several AES Variants under VHDL language In FPGA
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ABSTRACT This paper provides four different architectures for encrypting and decrypting 128 bit information via the AES. The encryption algorithm includes the Key Expansion module which generates Key for all iterations on the fly, Double AEStwo-key triple AES, AESX and

Arithmetical Operations in Quaternary System Using VHDL
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ABSTRACT While performing the several arithmetic operations such as addition, subtraction and multiplication the speed of modern computers are limited because of carry propagation delay. A carry-free arithmetic operation can be achieved using a higher radix number

Design And Implementation Of AMBA-AXI Protocol Using VHDL For Soc Integration
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ABSTRACT System-on-a-Chip (SoC) design has become more and more complexly. Because difference functions components or IPs (Intellectual Property) will be integrated within a chip. The challenge of integration is how to verify on-chip communication properties. Although

Integration of existing optimisation techniques with the DWARV C-to-VHDL compiler
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ABSTRACT Hardware acceleration using reconfigurable devices is a hot research item. To facilitate this acceleration technique, also called reconfigurable computing, tools are being developed that translate High-Level Languages into Hardware Description Languages.

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