CMOS FLIP FLOP-VLSI PROJECT
Low power CMOS counter using clock gated flip – flop free download The synchronous designs operates at highest frequency that derives a large load because it has to reach many sequential elements throughout the chip. Thus clock signals have been a great source of power dissipation because of high frequency and load. Clock signals do […]
FULL ADDER-VLSI PROJECT
Design of a novel fault tolerant reversible full adder for nanotechnology based systemsfree download Reversible computation plays an important role in the synthesis of circuits having application in quantum computing, low power CMOS design, bioinformatics and nanotechnology-based systems. Conventional logic circuits are not reversible. A reversible circuit maps each input Low-Power and High-Performance 1-Bit CMOS […]
MULTIPLEXER -VLSI PROJECT
A self-repairing multiplexer -based FPGA inspired by biological processesfree download Special-purpose parallel systems, and in particular cellular SIMD (Single-Instruction Multiple- Data-Stream) and SPMD (Single-Program Multiple-Data-Stream) array processors are very interesting approaches for handling many computationally-intensive applications. These Design of Reversible/Quantum Ternary Multiplexer and Demultiplexer.free download In this paper, we show realization of macrolevel ternary reversible […]
MAC UNIT DESIGN-VLSI PROJECT
VLSI design and implementation of low power MAC unit with block enabling techniquefree download In the majority of digital signal processing (DSP) applications the critical operations are the multiplication and accumulation. Real-time signal processing requires high speed and high throughput Multiplier-Accumulator ( MAC ) unit that consumes low power, which is always a VLSI Architecture […]
DIGITAL SIGNAL PROCESSOR -VLSI PROJECT
Modeling inter-instruction energy effects in a digital signal processor free download This paper explores techniques for creating accurate instruction-level energy models for digital signal processors (DSP). Our initial results confirm previous work showing that inter- instruction effects can become a significant component of power consumption for many 1 Introduction DOPPLER ULTRASOUND is widely used for […]
RTL PROJECTS -VLSI PROJECT
REGISTER-TRANSFER LEVEL Register-transfer-level abstraction is used in hardware description languages (HDLs) like Verilog and VHDL to create high-level representations of a circuit, from which lower-level representations and ultimately actual wiring can be derived. Design at the RTL level is typical practice in modern digital design. Power reduction through RTL clock gatingfree download This paper describes […]
VLSI LAYOUT
Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining millions of MOS transistors onto a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device. Before the introduction of VLSI technology, most ICs had a limited set of […]
SRAM LAYOUT-VLSI PROJECT
Static random-access memory is a type of semiconductor random-access memory that uses bistable latching circuitry to store each bit. SRAM exhibits data remanence, but it is still volatile in the conventional sense that data is eventually lost when the memory is not powered CMOS VLSI design of low power SRAM cell architectures with new TMR: […]
DRAM DYNAMIC RANDOM ACCESS MEMORY DESIGN -VLSI PROJECT
Analysis of power dissipation in DRAM cells design for nanoscale memoriesfree download In this paper power dissipation analysis for DRAM design have been carried out for the Nanoscale memories. Many advanced processors now have on chip instructions and data memory using DRAMs. The major contribution of power dissipation in DRAM is off-state Performance comparison of […]
SRAM DESIGN-VLSI PROJECT
Static random-access memory is a type of semiconductor random-access memory that uses bistable latching circuitry to store each bit. SRAM exhibits data remanence, but it is still volatile in the conventional sense that data is eventually lost when the memory is not powered Deep sub-micron sram design for ultra-low leakage standby operationfree download Design trade-offs […]