free research papers and research projects on FPGA recent 2014




Development of FPGA-based Predistortiontype Linearization Algorithms for Klystrons within Digital LLRF Control Systems for ILC-like Electron Accelerators
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Abstract Two different kinds of predistortion-type linearization algorithms have been implemented and compared on an FPGA within the digital LLRF control system the Advanced Superconducting Test Facility (ASTA) at the Fermi National Accelerator

Real-time FPGA-based Capture of Memory Traces with Application to Active Memory Emulation
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ABSTRACT Emulation with programmable logic can greatly accelerate evaluation of architectural features by near real time execution of applications. In this work, we have developed an FPGA emulator to selectively collect memory traces in real time without

Real-time and low latency embedded computer vision hardware based on a combination offpga and mobile cpu
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Abstract:Recent developments in smartphones create an ideal platform for robotics and computer vision applications: they are small, powerful, embedded devices with low-power mobile CPUs. However, though the computational power of smartphones has increased

LOW COST FFT SCOPE USING LABVIEW, CRIO AND FPGA
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Abstract At CERN, many digitizers and scopes are starting to age and should be replaced. Much of the equipment is custom made or not available on the market anymore. Replacing this equipment with the equivalent of today would either be time consuming or expensive.

Research on FPGA-Based Controller for Nonlinear System
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Abstract Many of linear control applications require real-time operation; higher density programmable logic devices such as field programmable gate array (FPGA) can be used to integrate large amounts of logic in a single IC. This work, proposes a developed method to

FPGA Based Modified Karatsuba Multiplier
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Abstract:Finite field arithmetic is becoming increasingly a very prominent solution for calculations in many applications. In this paper, complexity and delay of six different multipliers (Mastrovito multiplier, Paar-Roelse multiplier, Massey-Omura multiplier, Hasan-

Image Encryption using AES Algorithm based on FPGA
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ABSTRACT With the fast progression of data exchange in electronic way, information security is becoming more important in data storage and transmission. Because of widely using images in industrial process, it is important to protect the confidential image data

FPGA Based Design of a Fine-Grained Fault Tolerant Interleaved Memory
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Abstract:Memory bandwidth has been the bottleneck of modern computing systems with the advent of increasing processor speed. High speed processors engage themselves dealing data access with comparatively low speed memories resulting poor processor

Generation and implementation of Pseudorandom codes for Navigation System in FPGA
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Abstract:Satellite Navigation system provides autonomous geo-spatial positioning with global coverage, collectively being called Global Navigation Satellite System (GNSS). Most of these systems work on the principle of code division multiple access (CDMA), in which

FPGA Implementation of Normalization block of Fingerprint Recognition Process
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Abstract:The reliability of Fingerprint recognition process in turn the Fingerprint Recognition system depends on the minutiae. Accurate minutiae depend on the quality of the fingerprint image. Most of the images are of poor quality. This leads to distorted levels

Efficient and programmable ethernet switching with a NoC-enhanced FPGA
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ABSTRACT Communications systems make heavy use of FPGAs; their programmability allows system designers to keep up with emerging protocols and their high-speed transceivers enable high bandwidth designs. While FPGAs are extensively used for

Design and FPGA Implementation of Address Generator using Different Modulation Schemes for WiMAX Deinterleaver
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Abstract Wireless technology is emerged has the vibrant research areas in the modern communication industry. The IEEE 802.16 e has defined a standard called mobile WiMAX and emerged as the latest wireless technology that has promised to offer Broadband
In this paper, we propose a CAMShift inspired object tracker for VGA resolution images implemented in an FPGA with a view to using low-cost commercially available CMOS sensors. We discuss architectural issues that arise in trying to meet the dual constraints of

Analysis of 16 bit Microprocessor Architecture on FPGA using VHDL
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ABSTRACT: This paper involves the design and simulation of 16 bit microprocessor architecture on FPGA using VHDL. Significant features such as the, increased speed, minimal implementation real-estate, reduction in power and maximum configurability are

Towards A Low Power FPGA Implementation for A Stand-Alone Intraoral Tongue Drive System
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Abstract:Tongue Drive System (TDS) is a new assistive, unobtrusive, wireless, and wearable device that allows for real time tracking of the voluntary tongue motion in the oral space for communication, control, and navigation applications. The latest TDS prototype

DESIGN AND IMPLEMENTATION OF I2C SINGLE MASTER ON FPGA USING VERILOG
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Abstract: This paper focuses on the design of I2C single master which consists of a bidirectional data line ie serial data line (sda) and serial clock line (scl). This protocol has the ability to support multiple masters. I2C is a two-wire, bidirectional serial bus that provides

Communication and Interoperation for Field Bus Systems based on ARM and FPGA
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Abstract: Communication and interoperation are critical to modern industry. A reconfigurable intelligent gateway based on ARM and FPGA is proposed on the basis of current situation and developing trend of protocol converting to achieve communication and interoperation

Artificial Intelligence Based Dynamic Strain Measurement System on FPGA
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ABSTRACT: In this paper, design of Dynamic Strain Measurement System on FPGA using Wiznet is presented. Dynamic strain measurement system is used to overcome the traditional strain measurement system which has the disadvantages such as large

DEVELOPMENT OF DES ON FPGA USING VARIABLE TIME DATA PERMUTATION
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ABSTRACT This paper presents a data encryption standard algorithm for high performance reconfigurable data security applications. A novel skew core key by combining pipelining concept method is compared to various encryption algorithms. Design of DES is

An overview of hardware approach of FPGA design by using XILINX
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Abstract:Xilinx ISE (Integrated Software Environment) is a software tool manufactured by Xilinx for synthesis and analysis of HDL designs. Xilinx tools are capable of designing digital circuits using Field Programmable Gate Array (FPGA). Field-Programmable Gate Arrays (

Ambient Temperature Based Thermal Aware Energy Efficient ROM Design on FPGA
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Abstract:Thermal aware design is currently gaining importance in VLSI research domain. In this work, we are going to design thermal aware energy efficient ROM on Virtex-5 FPGA. Ambient Temperature, airflow, and heat sink profile play a significant role in thermal aware

" All Programmable SOC FPGA for networking and computing in big data infrastructure".
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Page 1.Copyright 2013 Xilinx . Ivo Bolsens, Senior Vice President CTO The All Programmable SoC FPGA for Networking and Computing in Big Data Infrastructure Page 1 Page 2. Page 22 Page 23.Copyright 2013 Xilinx . The UltraSCALE FPGA SoC Page 23 Page 24.

FPGA IMPLEMENTATION OF FLEXRAY CLOCK SYNCHRONIZATION MODULE IN NORMAL ACTIVE STATE OF POC MODULE
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Abstract:Modern automobiles are not merely mechanical devices, but they are becoming highly sophisticated by including more and more functions which are controlled by small digital computers known as Electronic Control Units (ECUs). As new functions are

10 GBd SOH Modulator Directly Driven by an FPGA without Electrical Amplification
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Abstract: Using standard single-ended FPGA outputs with 270 mVpp we demonstrate 10GBd OOK and BPSK transmission by directly driving a low-voltage silicon-organic hybrid (SOH) modulator. The scheme does not require electronic driver amplifiers, which paves

High Speed OFDM Implementation in FPGA
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Abstract:FPGA is one of the efficient economic way to implement the circuit. Orthogonal Frequency Division Multiplexing (OFDM) is a multicarrier modulation technique. OFDM provides high bandwidth efficiency because the carriers are orthogonal to each other and

32-Bit RISC and DSP System Design in an FPGA
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ABSTRACT: Reduced Instruction Set Computer (RISC) cores use fewer instructions with simple constructs, and therefore they can be executed much faster within the CPU without having to use memory as often. When combined with a digital signal processor system (

A New Hardware Implementation of Base 2 Logarithm for FPGA
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Abstract:Logarithms reduce products to sums and powers to products; they play an important role in signal processing, communication and information theory. They are primarily used for hardware calculations, handling multiplications, divisions, powers, and

Implementation of Variable Step Size MPPT Controller for Photovoltaic System on FPGACircuit
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Abstract:Energy demand across the world increases and resources become scarce, which increase the search for alternative energy resources and their associated technology. With advancements in power electronic technology, the solar Photovoltaic energy has been

Hardware Implementation of Virtual Reconfigurable Circuit for Fault Tolerant Evolvable Hardware System on FPGA
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Abstract This research verify and describes a Virtual Reconfigurable Circuit (VRC) that designed and implemented for a Fault Tolerant Evolvable Hardware (EHW) system used to calculate the thermal power output of Egypt's second Training and Research Reactor (

Allocation of FPGA DSP-macros in multi-process high-level synthesis systems.
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Page 1. Allocation of FPGA DSP-Macros in Multi-Process High-Level Synthesis Systems Page 6. FPGA Resource Sharing/targeting a Xilinx Virtex6 FPGAIn default mode Area when #FU because the FUs (MAC) are now mapped to the

FPGA-based EtherCAT Microcontroller circuit design of SPI communication for real-time systems
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Abstract: In this study a novel Microcontroller unit (MCU) circuit based on FPGA for EtherCAT system is presented. The resource utilization statistics of the MCU circuit are provided and the performance of the MCU circuit is analyzed. The first objective is to understand the

Tutorial 1-FPGA Architecture
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Verilog to routing (VTR) [2] is a tool which allows the effect of different FPGA architectural choices to be quantified. In this laboratory exercise, we will study the effect of such choices on performance. In answering these questions, marks will be awarded not only for

FPGA-based implementation of circular interpolation.
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ABSTRACT Owing to arithmetic speed's influence of computer software, the accuracy and speed of numerical control system's feed based on software interpolation are subject to certain restrictions. FPGA-based realization of four kinds of hardware circular interpolation

An FPGA-based Fine-grained Data Synchronization for Pipelining Computing Stages
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Abstract In recent years, there has been increasing interest on using task-level pipelining to accelerate the overall execution of applications mainly consisting of Producer-Consumer tasks. This paper proposes fine-grained data synchronization approaches to achieve

An Integrated Software Development Framework for PLC FPGA based Digital ICs
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Abstract: NuDE 2.0 (Nuclear Development Environment) is a model-based software development environment for safety-critical digital systems in nuclear power plants. It makes possible to develop PLC-based systems as well as FPGA-based systems simultaneously

QPSK MODULATION FOR DSSS-CDMA TRANSMITTER AND RECEIVER USING FPGA
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ABSTRACT Direct sequence spread spectrum technique, which also known as direct sequence code division multiple access (DS-CDMA), is one of the two approaches to spread spectrum modulation for digital signal transmission. Direct sequence CDMA is the most

Dual Cellular Automata on FPGA: An Image Encryptors Chip
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ABSTRACT Secure data transmission plays a crucial role in today's world. While the data in the form of images are required extensively, the need to safeguard the original images has become inevitable. An image encryption based on the architecture of 14-bit and S-bit

Design and Implementation of AES Algorithm Using FPGA
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Abstract: AES (Advanced Encryption Standard) is a specification published by the American National Institute of Standards and Technology in 2001, as FIPS 197. AES describes a symmetric-key algorithm which uses the same key for both encrypting and decrypting the
Zebra fish embryo is a popular model organism for in-situ toxicology analysis. It offers advantages over traditional bioassays by allowing visualisation of developing tissues and organs in response to chemical treatment. Over recent years, lab-on-a-chip (LoC)

AND CONTROL OF FUEL BY PRODUCING BROWN GAS BY HHO GENERATORING DEVICE CONTROLLED BY VHDL AND IMPLEMENTING IN FPGA
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Fuel optimization plays a vital role all over the world. In this work, there are three major faces: The first face is designing HHO generator assembly which is related to mechanical designs and second face is designing a circuit board for Pressure sensor, Temperature

Simulation of CMOS IO Standard Based Energy Efficient Gurmukhi Unicode Reader on FPGA
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Abstract:In order to fill the research gap of energy efficient hardware design in natural language processing, this project reports the designing of an energy efficient Gurumukhi Unicode Reader on Field Programmable Gate Array (FPGA). To avoid transmission line

A novel FPGA segmentation method based on the improved ant colony optimization.
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ABSTRACT The performance of Field Programmable Gate Array (FPGA) is closely related with its own reasonable segmentation, and the routing of FPGA forms when different functions perform on the segmented FPGA to meet different demands. For this reason, a

FPGA based Multichannel Bit Error Rate Tester for Spacecraft Data Acquisition System
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Abstract: Bit Error Rate (BER) is a principle measure of data transmission link performance. BER tester (BERT) consists of a Pattern Generator and an Analyzer that can be set to the same pattern. The payload data transmitted from the spacecraft consists of one, two or

MSB based embedding with integrity: An adaptive RGB Stego on FPGA platform
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Abstract: Information hiding as a field is extremely fast developing and one of the very few fields that derive its power from its inherent need for sophistication and complexity in its algorithms. Out of the ever growing list of information hiding methods, steganography has

Implementation of Scientific Calculator Using CORDIC Algorithm on FPGA
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Abstract: COordinate Rotation DIgital Computer (CORDIC) algorithm has potential for efficient and low-cost implementation of a large class of applications which include the generation of trigonometric, logarithmic and transcendental elementary functions, complex

FPGA Implementation of Wu-Manber Algorithm for BLASTN DNA Sequence Matching
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Abstract BLAST is one of the most popular sequence analysis tools used by molecular biologists. Blast is fast and it is ubiquitous within the genomic community. However, because the size of genomic databases is growing rapidly, the computation time of BLAST, when

Analysis and optimization of a deeply pipelined FPGA soft processor
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Abstract:FPGA soft processors have been shown to achieve high frequency when designed around the specific capabilities of heterogenous resources on modern FPGAs. However, such performance comes at a cost of deep pipelines, which can result in a

FPGA Based Real Time Object Tracking using Microblaze Core
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Abstract This paper presents the image processing system based on Field Programmable Gate Array (FPGA) which is capable of tracking real time object using micro blaze as a processor. The presented work combines both hardware and software flow in which

Interfacing the Analog Camera with FPGA Board for Real-time Video Acquisition
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Abstract:Advances in FPGA technology have dramatically increased the use of FPGAs for computer vision applications. The primary task for development of such FPGAs based systems is the interfacing of the analog camera with FPGA board. This paper describes

System Design Framework and Methodology for Xilinx Virtex FPGA Configuration Scrubbers
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Abstract:SRAM-based FPGAs, like Xilinx Virtex series, are susceptible to ionizing radiation and require configuration memory scrubbing in order to be used in harsh radiation environments. The scrubbing is typically performed by a scrubber device external to the

Development of intelligent traffic control system based on FPGA and single chip microcomputer technology.
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ABSTRACT There are a large number of combinatorial logic resources in FPGA, can complete the design of combinational logic circuit, larger scale. Microcontroller design of intelligent traffic light control system, change of state control signal by SCM, basically can

Simulation and FPGA Realization of Scramble Algorithm in TD-LTE System
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This paper mainly realizes scramble in TD-LTE system. It includes the introduction of scrambling; projects form; the process of FPGA implementation and the results analysis. Then it finishes simulation, synthesis and verification of board on Virtex-6. The

ASIP Design and FPGA Implementation of Fingerprint Authentication Application
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Abstract:This paper presents an ASIP design for fingerprint authentication application and its implementation on FPGA. The ASIP architecture is derived from existing embedded processor architecture, ARM. In order to optimize the architecture, some redundant

RECONFIGURABLE ACCELERATOR FOR BIOMETRIC SEARCH ENGINE USING FPGAAND MATLAB
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Biometric technologies are becoming the foundation of an extensive array of highly secure identification and personal verification solutions. One of the most significant parts of an investigation is fingerprinting. Today, the internet and high memory computers allow law

Study of Hummingbird Cryptographic Algorithms based on FPGA Implementation.
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Abstract:Cryptographic algorithms are ubiquitous in modern communication systems where they have a central role in ensuring information security. This thesis studies efficient implementation of certain widely-used cryptographic algorithms. Cryptographic algorithms

Benchmarking Niblack's binarization algorithm using OpenCV library integrated in C++ andFPGA simulation
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Abstract:Today, real-time processing has become a stipulation in all practical fields especially in image processing. This paper presents an experimental comparison of implementation of Niblack's Algorithm, a binarization algorithm for image-processing in

FPGA Implementation of Rao-Blackwellized Particle Filter and its Application to Sensorless Drive Control
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AbstractRao-Blackwellied particle filter is a stochastic filter combining Kalman filters with particle filters. It is suitable for models that could be decomposed into linear and nonlinear part. Since the conditionally linear part can be solved by the Kalman filter, the sequential

Performance Adaptive Sigma Delta Modulator Design (using LMS Algorithm) for Performance Enhancement of DSP Processors and FPGA Synthesis of the
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Abstract Enhancement of the performance and speed of the Digital Signal processing processors are the major challenge due to its wide spread real world applications. At the same time high quality (less erroneous) and high speed digital inputs are required for

Digital Systems Design Based on DSP Algorithms in FPGA for Fault Identification in Rotary Machines
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Abstract-This paper deals with a top down design methodology to DSP algorithms based on FPGA. Additionally, DSP algorithms, such as FIR filters, fast Fourier transform (FFT), and the high-frequency resonance technique (HFRT), are implemented in the hardware

Bidirectional Buck-Boost Controller for Electric Vehicle Using FPGA Board
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ABSTRACT Due to increasing of fuel price, a new vehicle without using fuel is required to reduce dependent on fuel consumption. Electric vehicle used battery as an energy source and electric motor as propulsion components. A converter is required to control the power

Pedestrian Detection Image Processing with FPGA
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Page 1. i Pedestrian Detection Image Processing with FPGA A Major Qualifying Project Report (HOG) feature descriptor algorithm in combination with a Linear Support Vector Machine (LSVM) on a Field Programmable Gate Array (FPGA). Pedestrian detection on embedded

Implementation of data acquisition interface using on-board field-programmable gate array (FPGA) universal serial bus (USB) link
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Abstract. Typically a system consists of hardware as the controller and software which is installed in the personal computer (PC). In the effective nuclear detection, the hardware involves the detection setup and the electronics used, with the software consisting of

An FPGA Based Crypto Processor through Triangular Modulo Arithmetic Technique (TMAT)
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ABSTRACT In this paper a block cipher based new cryptosystem has been proposed, where the encryption is done through Triangular Modulo Arithmetic Technique (TMAT), which consists of three phases. The original message is considered as a stream of bits. In Phase

FPGA-Accelerator for DNA Sequence Alignment Based on an Efficient Data-Dependent Memory Access Scheme
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ABSTRACT The mapping of millions of short DNA fragments to a large genome is a very important aspect of the modern computational biology. However, software-based DNA sequence mapping takes many days to complete. This paper proposes an FPGA-based

Using Grey Relation to FPGA Multi-Objective Task Scheduling on Dynamic Reconfigurable System
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Abstract:Due to the FPGA technology evolution and market demand, the scheduling of the reconfigurable system has become an important part. From the past before run time the static schedule, with the evolution of technology, the dynamic scheduling is developed to

Design and Implementation of Differential Evolution Algorithm on FPGA for Double-Precision Floating-Point Representation
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Abstract: The paper presents the results of implementation of differential evolution algorithm on FPGA using floating point representation with double precision useful in real numeric problems. Verilog Hardware Description Language (HDL) was used for Altera hardware

Testing and Performance Analysis of 10 Gigabit Ethernet on Altera Stratix V FPGA
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In the high-energy physics experiment a large amount of data are produced at a very high rate. With upgrade that will be taking place in ALICE experiment at LHC in 2018 after Long Shutdown 2, the data flow will be of about 1 TB/s [1]. There are a large number of front-end

Optimization in MATLAB for cardiac excitation modeling towards FPGA standalone simulation tools
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In past few decades, most of the modern electrophysiological concepts and methods were developed by the computational technique extensively to compute the cardiac action potential in nerve cells. Thus, tissue models consisting of a large number of single cell

ASTERICS-An Open Toolbox for Sophisticated FPGA-Based Image Processing
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Abstract:Image processing on embedded platforms is still a challenging task, especially when implementing extensive computer vision applications. Field-programmable gate arrays (FPGAs) offer a suitable technology to accelerate image processing by customized

Application of FPGA in high-speed CMOS digital image acquisition and color recognition system.
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ABSTRACT FPGA can solve the lack of custom circuit, and overcome the original programmable gate device limited number of faults. The paper presents application of FPGA in high-speed CMOS digital image acquisition and color recognition system. Color

FPGA Implementation of Audio Enhancement using Xilinx System Generator
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Abstract: Digital audio has become very popular in the last two decades. With the growth of multimedia systems and the World Wide Web, audio processing techniques, such as filtering, equalization, noise suppression, compression, addition of sound effects and

Fall detection application on an ARM and FPGA heterogeneous computing platform
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ABSTRACT: Heterogeneous computing platform, Zynq-7000 all programmable system-on- chip, not only accomplishes high efficiency solution in emerging the power consumption, execution time for implementing the Fall Detection application but also takes the

Design and FPGA Implementation of High Speed DWT-IDWT Architecture with Pipelined SPIHT Architecture for Image Compression
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SJB Institute of Technology, India Abstract-Image compression demands high speed architectures for transformation and encoding process. Medical image compression demands lossless compression schemes and faster architectures. A trade-off between

Real Time Object Tracking using FPGA Development Kit
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Abstract:The main idea of this work is object tracking using real time video processing. For this purpose we designed an embedded system that performs the object tracking algorithm for accurate tracking of defined object. The theme may be implemented for the security

Design and Implementation of Unified DCT/IDCT Architecture Based on FPGA
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Abstract. This paper proposes a unified architecture for computation of discrete cosine transform (DCT) and its inverse transform (IDCT). The matrix decomposition algorithm is used to deduce the proposed algorithm. Based on this algorithm, a unified DCT/IDCT

FPGA implementation of orientation field estimation of fingerprint recognition process
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Abstract:Most of the automatic fingerprint verification systems are based on minutiae pattern matching. The accuracy of the system depends on the quality and location of minutiae. Most of the time, the quality of the ridges in the fingerprint image is not well

Design and Implementation of Federal Kalman Filter Based on FPGA
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Abstract. The Federal Kalman filter is a kind of high operational efficiency autoregressive filter, it can estimate the dynamic system status values from measurement data containing noise. This article does some research about how to implement Federal Kalman filter with

Review on FPGA Implementation of OFDM
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Abstract-The technique of orthogonal frequency division multiplexing (OFDM) is famous for its robustness against frequency-selective fading channel. This technique has been widely used in many wired and wireless communication systems. The main objective of this

Design and Implementation of I2C Communication Protocol on FPGA for EEPROM
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Abstract:The I2C protocol was given by Philips Semiconductors in order to allow faster devices to communicate with slower devices and also allow devices to communicate with each other over a serial data bus without data loss. We here present a model of I2C bus

Proficient FPGA Execution of Secured and Apparent Electronic Voting Machine Using Verilog HDL
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Abstract Electronic Voting Machine is an electronic voting device used for conducting the parliamentary elections electronically. It consists of two units that can be inter-linked; a ballot unit which a voter uses to exercise his vote and a control unit which used by the polling The present work investigates Multi-channel Active Vibration Control (AVC) of a composite research wing model and shell structure using modified Filtered x Least Mean Square (FxLMS) algorithm on Field Programmable Gate Arrays (FPGAs). AVC, using Digital

Coprocessor Design using FPGA
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Abstract-The use of the microprocessor, as a tool, has been widely used for the cost reduction and the technological innovations. The programmability of the microprocessor and its speed are the main performance characteristics of the microprocessor. Therefore, to

Impact of Clocking Sources on Electro-Magnetic Interference in Digital FPGA Chips
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Abstract: Electro-Magnetic Interference (EMI) has been a challenging issue on the designs of a high-speed printed circuit board (PCB) and digital circuits. The EMI emitted from a chip can produce incorrect signaling due to the EM noises that change the value of signal lines

High speed micromouse servo controller based on DSP and FPGA.
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ABSTRACT Micromouse is an intelligent walking robot using embedded technology, depending on sensors for navigation, which consists of the ability to collect and gather information of the complex maze" after forward and backward searching without human

Digital real-time multiple channel, multiple mode neutron flux estimation FPGA-based device
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Abstract. This paper presents a complete custom full-digital instrumentation device that was designed for real-time neutron flux estimation, especially for nuclear reactor in-core measurement using subminiature Fission Chambers (FCs). Entire fully functional
Due to the exponential increase in hardware design costs and risks of making customized chips, the electronics industry has begun shifting towards the use of reconfigurable devices such as field programmable gate arrays (FPGAs) as mainstream computing platforms. An

Review of FPGA Based Data Hiding Data in Digital Images
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Abstract. In recent years, the applications about multimedia have been developed rapidly. Digital media brings about conveniences to the people, because it is easy to be processed. At the same time, it enables the illegal attackers to attack the works. For the protection of

Blind Restoration of Radiological Images Using Hybrid Swarm Optimized Model Implemented on FPGA
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Abstract: Image restoration step is important in many image processing applications. In this work, we attempt to restore radiological images degraded during acquisition and processing. Details of the work, carried out to optimize a Neural Network (NN) for

Profiling-Driven Multi-Cycling in FPGA High-Level Synthesis
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Abstract:Multi-cycling is a well-known strategy to improve performance in digital design, wherein the required time for selected combinational paths is lengthened to multiple clock cycles (rather than just one). The approach can be applied to paths associated with

Towards a FPGA-based Universal Link for LVDS Communications: A First Approach
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Abstract:We present a first approach to a FPGA-based universal link to handle different low- voltage differential signaling (LVDS) connections without changing the configuration of the transmitters or components. LVDS is one of the fastest and cheapest electrical digital

Dual Quantum Random Number Generator using a FPGA for QKD-CV systems: Preliminary results
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Abstract:This paper presents the preliminary results of a dual quantum random number generator using a FPGA DE0 Nano and optical set-up experiment with variable transmission rate from 10 to 50 Mbps using coherent detection to detect the quadrature components in

Sorting Control System Design of New Materials Sorter Based on FPGA.
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Abstract A new sorting control system in field programmable gate array (FPGA) the core of control was proposed because the previous one couldn't meet the requirements of the multi-channel and high yield. It focused on designs of both hardware circuit and FPGA

An Improved Rotary Interpolation Based on FPGA.
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Abstract: This paper presents an improved rotary interpolation algorithm, which consists of a standard curve interpolation module and a rotary process module. Compared to the conventional rotary interpolation algorithms, the proposed rotary interpolation algorithm is

Evaluation on High Level Synthesis for Parallel Computing in FPGA
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Abstract: The trends in technology are improving in almost all areas of application that varies from consumer goods, industrial application, electronic gadgets and communication. As the technological trends are improving the complexity in electronic design increases along

Embedded Systems course using Altera FPGA
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Abstract As the number of embedded system applications and their complexities are increasing there is a demand to use the advanced technologies for embedded system design. This course describes the concepts of system design with the latest FPGAs (Field
Electrocardiogram (ECG) can provide valuable clinical information on cardiac functions. This paper illustrates an algorithm for real–time detection of wave peaks and their features from single lead ECG data. At first, the ECG data was filtered for power line interference and

FPGA Implementation of a high speed Vedic multiplier
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Abstract-Since most of the important DSP algorithms such as Fast Fourier Transforms, Convolution etc incorporate complex multiplication computations, the overall time utilized is high. In the proposed design we have implemented a vedic multiplier using the 'Urdhva

FPGA Design of a Camera Control System for Road Traffic Monitoring
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Abstract:Video surveillance and monitoring more than a decade now remains a big challenge. Today is becoming more and more vital due to rapid development of hardware equipments as well as the software methods that support intelligent monitoring and

A Survey on Inner FPGA Communication Path of USRP
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Abstract:USRP (universal software radio peripheral) is a modest, adaptable radio that turns a PC into the wireless prototyping platform. USRP is widely used as RF transceiver, cognitive radio application, physical layer prototyping etc. USRP is a hardware used for

Design of Commutative Cryptography Core with Key Generation for Distributed FPGAArchitecture
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Abstract Data security during communication is one of the predominant issues in modern multiple transceiver based communication. In this paper, we have presented a highly robust commutative cryptography core for distributed FPGA architecture called commutative RSA

Implementation of AES-GCM encryption algorithm for high performance and low power architecture Using FPGA
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ABSTRACT Evaluation of the Advanced Encryption Standard (AES) algorithm in FPGA is proposed here. This Evaluation is compared with other works to show the efficiency. Here we are concerned about two major purposes. The first is to define some of the terms and

New Version of AES-ECC Encryption System Based on FPGA in WSNs
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ABSTRACT According to the threat of the data transmission on wireless sensor networks, a technique for speeding up point multiplication, an improved AES-ECC hybrid encryption system with cross encrypted keys for secure key exchange is presented. This scheme use

FPGA Implementation of Computer Vision Algorithm
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For applying image processing algorithms onto hardware, the most popular used algorithm that is implemented on the FPGA is the convolution. Many researchers have used FPGA to be the platform to accelerate the image processing system to approach their needs.

The study of chaos encryption algorithm for wireless sensor networks based on the reconfigure technology of FPGA.
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ABSTRACT The factors restricting the development of wireless sensor networks (WSNs) included its cost, power consumption and safety. The Field Programmable Gate Array (FPGA) had many advantages with high processing speed, high frequency, low power

Validation of a Real-time AVS Encoder on FPGA.
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Abstract: A whole I frame AVS real-time video encoder is designed and implemented on FPGA platform in this paper. The system uses the structure of the flow calculation, coupled with a dual-port RAM memory between/among the various functional modules. Reusable

Design and Implementation of 1-D and 2-D Mixed Architecture FFT Processor in Heterogeneous Multi-core SoC based on FPGA.
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Abstract A novel architecture FFT processor which can carry on 1-D FFT algorithm or 2-D FFT algorithm corresponding different size of FFT is proposed in this paper. The architecture is served as a scalable IP Core which is suitable for the heterogeneous multi-core SoC on

FPGA-based three phase inverter control system for photovoltaic power generation
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ABSTRACT Following to the important increase of electrical power demand around the world, many researchers are attempting to find new energy sources away from the fossil fuels. In this regard, the utilization of renewable energy resources, such as wind,
Sophisticated engine controls have progressively become vital enablers for implementing clean and efficient combustion. The low temperature combustion in diesel engines is a viable combustion mode that offers ultra-low nitrogen oxides and dry soot emissions, yet

Metastability-based Feedback Method for Enhancing FPGA-based TRNG.
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Abstract This paper presents a novel and efficient method to enhance the randomness of a Programmable Delay Line (PDL)-based True Random Number Generator (TRNG) by introducing Metastability-based Feedback scheme. As a principal tool for the security of

FPGA-based Realization and Simulation of Channel De-interleaving in TD-LTE system
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Chongqing Key Lab of Mobile Communications, Chongqing University of Posts and Telecommunications, Chongqing 400065, China awanghh@ cqupt. edu. cn, bjiangcaoyong213@ 163. com, clikesunday@ 163. com, d597715379@ qq. com Key

Implementation of Quantum dot Cellular Automata based Multiplexer on FPGA
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Abstract: A novel technology the Quantum dot Cellular Automata (QCA) appears to be an alternate nano scale technology to provide the properties and functionalities of that have made CMOS successful over the past several decades. The experiment is carried out in

An Enhanced Railway Transport System using FPGA through GPS GSM
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Abstract-Travel time information is a vital component of many intelligent transportation systems (ITS) applications. In recent years, the number of passengers travels in train number of trains in India has increased tremendously. Due to the increase in number of

A Real-Time Implementation Of An Autonomous Uav Controller Using Fpga: Based On Fuzzy Logic Approach.
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Abstract:Controlling numerous actuators and sensors of a UAV simultaneously, is slightly challenging. Also, in nonlinear systems, which there are plenty of parameters to be identified and controlled, the fuzzy controllers, will permit more robust control than classic controllers

FPGA Implementation of Watermarking Scheme Using XSG
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Abstract Now a day's hardware realization of image processing applications using FPGA is an important area of research due to the speed of implementation, low development costs and less time to market. This is due to the parallelism existing in it. In this paper an efficient

Simulation and Optimization of VHDL code for FPGA-Based Design using Simulink
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Abstract:Simulations and prototyping have been a very important part of the electronics industry since a very long time. In recent years, FPGA's have become increasingly important and have found their way into all kind of digital system design This paper presents a novel

On the Design of a Reconfigurable Radio Processor Using FPGA.
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Abstract:High performance DSP processors are unable to meet the speed requirements of Software Defined Radio (SDR), System on chips (SOCs) are also not suitable because of their limited flexibility. Recently dynamically reconfigurable FPGAs have emerged as high

DESIGN AND FPGA IMPLEMENTATION OF SEQUENTIAL DIGITAL 9-TAP FIR FILTER USING MICROPROGRAMMED CONTROLLER
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Abstract: The paper presents the design and FPGA implementation of sequential digital 9- tap FIR filter using a novel micro programmed controller based design approach. In the paper, the FIR filter is designed for operation controls by micro programmed controller.

Design and Implementation of High Security Optical Shaft Encoder for an Artificial Limb using Xilinx on FPGA
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Abstract FPGA technology is used to make logic systems and it is majorly based on Computer-Aided Design (CAD). In this paper, the main aim is to introduce and implement our own logic for high security optical shaft encoder for an artificial limb using Xilinx

EFFICIENT FPGA-BASED INVERSE PARK TRANSFORMATION OF PMSM MOTOR USING CORDIC ALGORITHM.
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ABSTRACT A real-time field programmable gate array (FPGA) debugging system design is presented in this work. Inverse Park Transformation, which is an important module in Field Oriented Control (FOC) focuses on fast computation with good accuracy. The integrated

The Design of Step Motor Subdivision Drive Controller Based on FPGA
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Abstract. This paper, based on the EDA software platform and VHDL description method, introduces how to use the FPGA chip to control the multiphase stepper motor. This design, through automatic logic compilation optimization and simulation test and compile, finally

D3. 1: Hybrid FPGA ASIC prototype
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Abstract: This document is the accompanying report to the hybrid FPGA ASIC prototype. The report describes shortly the demonstrator goals, as well as the setup, design and the implementation. Keywords: Physically Unclonable Functions, Prototype, Scenarios,

Hardware Acceleration of Hamming Code: Design of Runtime Reconfigurable FPGA Prototype
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ABSTRACT Digital communications has helped us achieve two way conversations in digital domain, in which messages are encoded into the communication channel and then decoded at the receiver end. During the transfer of message, the data might get corrupted

Realization and Simulation of High Speed Flexible Transmission System between FPGA Chips Based on SRIO
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This paper issued a new scheme that passing the configuration information of SRIO to FPGA through EMIF interface, so that two FPGAs can transfer data to each other dynamically for different ways of data interaction. In a word, this paper provides a flexible high-speed

Design and Implementation of Digital Communication Platform Based on FPGA/DSP
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Abstract. A method to design and implement digital communication platform was in introduced in this paper. The platform based on software radio method can change modulation method conveniently without the change of hardware system because it used

A HARDWARE REALIZATION OF MULTIPOINT ELECTRONIC DEVICE USING FPGA AND NEURAL NETWORK
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Neural Networks (NN) play a crucial rule in all intelligent system design, as its ability to learn and mimic brain behavior. Many applications use Neural Networks in their implementations such as identify, simulate and control nonlinear system. In this work, a neural network

An Accurate FPGA-Based Hardware Emulation on Quantum Fourier Transform
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Abstract Powerful parallelism is among the leading attractions towards quantum computing research. Before large-scale quantum computers become viable, the use of fieldprogrammable gate array (FPGA) technology which can mimic the behavior of

A Design of FPGA-based System for Image Processing
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Abstract:We evaluated the performance of a hardware architecture designed to perform a wide range of fast image processing tasks. The system architecture is based on hardware featuring a Field Programmable Gate Array (FPGA) co-processor and a host computer. A

FPGA Implementation of Denoising Speech Signal using Stationary Wavelet Transform
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Abstract: Speech signals are often contaminated with acoustic noise, which is present in a variety of listening environments. This problem is of critical importance because background noise is particularly damaging to speech intelligibility for people with hearing loss and

Stimulus generation technique for code simulation of FPGA based gamma spectroscopy system
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Abstract. The aim of this study is to develop a software that can systematically generate stimulus required for code simulation (functional and timing) of new digital processors in gamma spectroscopy system. Software must be able to produce stimulus that emulate

Smart Energy Management System for Utility Source and Photovoltaic Power System UsingFPGA and ZigBee
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Abstract: Renewable energy resources are being used to overcome energy shortage. From the point of view of energy management the interconnectivity of electric utility with renewable energy resources is difficult. Renewable energy resources need to be managed with

Reduction of Power Consumption for Pipelined DPI Systems on FPGA
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We propose a scheme to reduce power consumption in pipelined AC-DFA (Aho-Corasick deterministic finite automaton) tries for deep packet inspection (DPI). It is based on our observation that the access frequency drops dramatically as the input goes through stages

Fast 8× 8× 8 RCF 3D_DCT/IDCT transform for real time video compression and its FPGAImplementation
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ABSTRACT Video compression takes place increasingly in many applications which are constantly involving. It becomes more demanding in terms of performance at the expense of more power consumption. Discrete Cosine transform is the most common technique used

FPGA Based Implementation Of Baseband OFDM Transceiver Using VHDL.
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(OFDM) is a multicarrier communication system. It is widely used because of its immunity to frequency selective fading channels. In this paper, the design and an implementation of OFDM transceiver on FPGA is presented. The system is designed using VHDL,

FPGA Based Implementation of Gain Control Block for OFDM System
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Abstract In the OFDM (Orthogonal Frequency Division Multiplexing) system, the fast synchronization is required which in general could be achieved using the preamble located in the header part of the data packet. The modulated and transmitted signal experiences

A Review Paper on Implementation of UART Controller with Automatic Baud Rate Generator using FPGA
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Abstract: UART (Universal Asynchronous Receiver Transmitter) is a kind of serial communication protocol; mostly used for short-distance, low speed, low-cost data exchange between computer and an output device. In this, we present a design method of

Voltage Scaling Based Energy Efficient FIR Filter Design on FPGA
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Abstract In this paper Voltage Scaling is used to design energy efficient Gaussian FIR Filter. This design is implemented on Kintex-7 FPGA, XC7K70T device,-3 speed grade and FBG676 package. Among all powers in FPGA, it is observed that Logic Power have

A New FPGA Prototype for Synchro to Digital Converter Using CORDIC Algorithm
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Abstract:This paper introduce a new approach to FPGA implementation of synchro to digital converter using Co-ordinate Rotation Digital Computer CORDIC algorithm. This algorithm was the best replacement of analog conversion system by the high resolution

Floating-Point Single-Precision Fused Multiplier-adder Unit on FPGA
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Abstract The fused multiply-add operation improves many calculations and therefore is already available in some generalpurpose processors, like the Itanium. The optimization of units dedicated to execute the multiply-add operation is therefore crucial to achieve

FPGA-based Realization and Simulation of Tail-biting Convolutional Coding and Decoding in TD-LTE System
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Abstract. This paper is based on the FPGA-based realization of tail-biting convolutional coding and decoding in LTE system, including simulation, synthesis and board-level verification on the Virtex-6 chip. Implementation results show that, the encoding and

FPGA Implementation of Fast Elliptic Curve Cryptography using Itoh-Tsujii algorithm
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ABSTRACT This paper primarily focuses on designing a high-performance Elliptic Curve Cryptography (ECC) architecture and implementations of ECC over GF (2163) provides the better security with less key size. Three complex instructions were used to reduce the
Many applications in image processing have high degrees of inherent parallelism and are thus good candidates for parallel implementation. In fact, programming tools for field programmable gate array (FPGA), SIMD instructions on CPU and a large number of cores

IMPLEMENTATION OF A VERILOG-BASED DIGITAL RECEIVER FOR 2.4 GHZ ZIGBEE APPLICATIONS ON FPGA
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Abstract This paper presents the implementation of a digital receiver for 2.4 GHz Zigbee IEEE 802.15. 4 applications on a Spartan3E XC3S500E field programmable gate array (FPGA). The proposed digital receiver comprises an offset quadrature phase shift keying (

Design of the Parallel to Serial Communication Conversion System Based on FPGA
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Design of RF Heat Therapy System Based on DS18B20 and FPGA.
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Abstract: In the process of research and development of this subject, it compares the three major heat physics technology. According to the organizational characteristics of glioma, it uses radiofrequency capacitive heating method. For conventional temperature sensor's

Design and Implementation of Rough Set Algorithms on FPGA: A Survey
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Abstract:Rough set theory, developed by Z. Pawlak, is a powerful soft computing tool for extracting meaningful patterns from vague, imprecise, inconsistent and large chunk of data. It classifies the given knowledge base approximately into suitable decision classes by

Selective Harmonic Elimination for a Single-Phase 13-level TCHB Based Cascaded Multilevel Inverter Using FPGA
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Abstract This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE

A novel approach towards performance analysis of vedic multiplier using FPGA s
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Abstract:This Paper proposes the implementation of multiplier using ancient Indian vedic mathematics(Urdhvatiryagbhyam) that has been modified to improve performance of high speed mathematics, it shows the modified architecture for a 16* 16 Vedic multiplier

SYSTEM DESIGNING AND MODELLING USING FPGA
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ABSTRACT This paper presents the overview of an FPGA system in which different complex arithmetic and logical operations are performed by using a set of programmable and reconfigurable arrays of various logic gates and the task of performing a single operation

FPGA-Based Implementation of QR Decomposition
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ABSTRACT This thesis report aims at introducing the background of QR decomposition and its application. QR decomposition using Givens rotations is a efficient method to prevent directly matrix inverse in solving least square minimization problem, which is a typical

Implementation FPGA of Public Key Cryptosystems Based on Finite State Machines Reconfiguration.
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Abstract The method of the finite state machine (FSM) for public key cryptosystem is allows to reduce key's length of the cryptosystem without reducing ryptographic strength. A reconfigurable finite state machine is entered into public key cryptosystem's model. A

Design of a Edubot-Micromouse based on MCU+ FPGA
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Optimizing Memory Power in Hybrid ARM-FPGA Chips With Lossless Data Compression
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ABSTRACT In current electronic systems the amount of power needed by the memory components can represent a large percentage of overall power requirements, and while modern DRAM memories offer very low idle power states, the reduction in active power is

FPGA Implementation of Fast Arithmetic Unit Based on QSD.
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Abstract:: Design of binary logic circuits is easily possible when the interconnection is less. As the number of inputs increases the interconnections is tedious work. The complexity increases, as chip area is reduced. To overcome the problem multi-valued logic is

QPSK Modulator on FPGA using 64 Values ROM.
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Abstract:In many applications such as TDMA cellular telephone, OFDM, Bluetooth, Satellite communication etc. QPSK digital modulation technique is used due to its higher bandwidth efficiency, higher noise immunity and simpler circuit. Simpler circuit is having lower cost,

Archipelago-An Open Source FPGA with Toolflow Support
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Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first

FPGA Implementation of the Non-Redundant Error-Correcting Scheme Based on Chaotic Dynamics
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Abstract: This paper presents the design procedure and implementation results of a non- redundant error correcting scheme based on chaotic dynamics using Altera Cyclone III family FPGA board. The scheme is first designed using MATLAB-Simulink then converted

2012 year papers on fpga



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analog programmable gate array



Field Programmable Gate Array Implementation of 14 bit Sigma-Delta Analog to Digital Converter
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ABSTRACT This paper the design and FPGA implementation of a delta sigma A/D convertor. The proposed converter has been designed using Xilinx system generator tool, which reduces the design cycle by directly generating efficient VHDL code. The VHDL code has

A Floating-Gate-Based Field-Programmable Array of Analog and Digital Devices
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ABSTRACT A hybrid, mixed-signal, reconfigurable system, based on the combination of a field- programmable analog array (FPAA) and FPGA is presented. The chip is a fine-grained interleaving of interchangeable analog and digital tiles, wherein a tile comprises either

OF ANALOG-TO-DIGITAL CONVERTER AND DIGITAL-TO-ANALOG CONVERTER INTEGRATED WITH FIELD PROGRAMMABLE GATE ARRAY BASED
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ABSTRACT In major electronics applications, digital signal processing (DSP) has replaced analog signal processing (ASP) in system operations due to its performance of high speed, low power consumption and high noise immunity. However, only the analog continuous-

Request paper-FPGA and GPU implementation of large scale SpMV



FPGA and GPU implementation of large scale SpMV
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Abstract Sparse matrix-vector multiplication (SpMV) is a fundamental operation for many applications. Many studies have been done to implement the SpMV on different platforms, while few work focused on the very large scale datasets with millions of dimensions. This

- 2012-fpga

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